Scaling of complementary metal-oxide-semiconductor (CMOS) technology to the nanoscale introduces many limitations such as significantly increased leakage currents, high power dissipation, and short-channel effects. Carbon nanotube field-effect transistors (CNFETs) have been proposed as an efficient alternative for designing high-performance, low-power circuits. The Multiplication operation is fundamental to many computing systems, including microprocessors and digital signal processors (DSPs), where compressor cells serve as the basic building blocks for accumulating partial products. In this paper, we first review and analyze ten existing 5-to-2 compressor architectures. Subsequently, we propose a novel 5-to-2 compressor design based on CNFET technology. The proposed design was comprehensively simulated under varying environmental conditions using the Synopsys HSPICE tool. Its performance was compared against four state-of-the-art 5:2 compressors in terms of delay, power consumption, and power-delay product (PDP). The simulation results clearly demonstrate the superior performance of the proposed design, consistently achieving a lower PDP compared to all other considered designs.