Clean, Crackless and selective transfer of graphene using reduced graphene oxide and graphene sheet with APTES layers on silicon substrates

Document Type : Research Paper

Author

Department of Electrical Engineering, Shab.C., Islamic Azad University, Shabestar, Iran.

Abstract

In this study, we introduce an optimized four-step transfer protocol consisting of modified RCA cleaning, short-time Piranha activation, controlled APTES surface functionalization, and selective PMMA protection, aiming to achieve clean, crack-free, and selective transfer of graphene and RGO sheets onto Si/SiO₂ substrates. The novelty of this work lies not in the individual use of these steps, but in the engineered sequencing and precise control of the operational parameters, which collectively yield simultaneous improvements in surface cleanliness, layer continuity, and structural uniformity.Raman spectroscopy of the RGO sheets revealed a G band centered at 1572.1 cm⁻¹ and a 2D band at 2627 cm⁻¹, with low standard deviations, indicating high structural uniformity and a significant reduction of defects in the final film. SEM imaging and EDX elemental mapping further confirmed the removal of surface contaminants, elimination of processing residues, improved film continuity, and homogeneous elemental distribution across the surface.For the selective transfer stage, the use of a lithographic mask together with selective PMMA protection enabled accurate placement of patterned graphene exclusively onto the target regions, while the non-target areas remained intact on the original substrate. This capability provides an effective route for fabricating van der Waals devices, hybrid structures, graphene-based sensors, and flexible electronic components. Overall, the proposed approach enables clean, low-defect, and highly reproducible transfer of graphene/RGO sheets, offering a practical pathway toward large-scale fabrication and seamless integration of graphene into device architectures such as field-effect transistors, bilayer pseudospin structures, and other micro/nano-electronic systems.

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Articles in Press, Accepted Manuscript
Available Online from 17 May 2026
  • Receive Date: 22 November 2025
  • Revise Date: 13 December 2025
  • Accept Date: 24 December 2025