مدل سازی جامع خازن فلز-اکسید-نیمرسانا مد تخلیهای برای شبیهسازی مداری

نوع مقاله : مقاله برق

نویسندگان

1 استادیار، گروه مهندسی پزشکی، دانشگاه صنعی همدان

2 استادیار گروه مهندسی پزشکی- دانشگاه صنعتی همدان

چکیده

مدل جامعی برای یک خازن MOS، که به صورت یک MOSFET n- کانال نوع تخلیه ای در یک فن آوری CMOS زیر میکرونی پیاده سازی شده است، ارائه می شود. این مدل وابستگی ظرفیت خازنی به ولتاژ گیت را روی تمام گستره ولتاژ های عملیاتی منظور می کند و برازش آن به داده های اندازه گیری شده ظرفیت خازنی بر حسب ولتاژ گیت با ضریب همبستگی 99/0 مشخص می شود. با در نظر گرفتن خازن گیت و مقاومت سری مربوط به آن به صورت یک شبه RC گسترده یک مدل زیر مداری واقع گرایانه برای خازن MOS به دست می آید که امکان مدل سازی دقیق آثار پرفرکانس و ضریب کیفیت خازن را فراهم می کند. کارآیی مدل زیر مداری خازن MOS با استفاده از شبیه سازی اسپایس تایید شد و برای بهبود دقت شبیه سازی روشی برای مدل سازی مقاومت کانال به صورت یک مقاومت کنترل شونده با ولتاژ ارائه شد.

کلیدواژه‌ها


عنوان مقاله [English]

Comprehensive Modeling of the Depletion-mode MOS Capacitor for Circuit Simulation

نویسندگان [English]

  • Shahriar Jamasb 1
  • Mohammad Bagher Khodabakhshi 2
1 Assistant Professor, Biomedical Engineering Department, Hamedan University of Technology, Hamedan, 65169-13733, Iran
2 Assistant Professor, Biomedical Engineering Department, Hamedan University of Technology, Hamedan, 65169-13733, Iran,
چکیده [English]

A comprehensive model is developed for a MOS capacitor implemented using an n-channel depletion-mode MOSFET fabricated in a submicron CMOS technology, which accounts for the voltage dependence of the MOS capacitance over the entire range of operating voltages. Notably, the model, whose active component is derived based on the industry-standard BSIM3 MOSFET model, fits the measured capacitance-voltage data with a goodness of fit characterized by coefficient of correlation of 0.99. By considering the gate capacitance and the associated series resistance as a distributed RC network, a realistic compact subcircuit representation is obtained for the MOS capacitor, which allows modeling of the limitations imposed by the series resistance on high-frequency performance as well as the quality factor. The model is also validated based on SPICE simulations with the channel resistance associated with the inversion layer modeled as a voltage-controlled resistor in order to account for the nonlinearity of the parasitic series resistance associated with the MOS capacitor.

کلیدواژه‌ها [English]

  • MOS capacitor
  • Depletion-mode MOSFET
  • BSIM3 Model
  • Charge thickness model
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